The sensors have resolutions from VGA up to 10Mpixels and some can run at 10,000 full frames per second. The sensor
architecture can consist of two halves, quadrants or one pixel array. The outputs can be parallel
analog outputs, one digital 10
bit output or digital
serial LVDS outputs. The outputs operate at speeds up to 50Msamples/s each, thus realizing a 5.5Gpix/sec pixel throughput. This is the highest reported continuous pixel throughput for an image sensor to date. Image quality is at least 10bit, so after digitization in the camera the data throughput can be 55Gbit/sec. The target applications always require a 6T snapshot pixel with a high sensitivity and high dynamic range. The sensitivity of these image sensors depends greatly on the
pixel size. This results in very big pixels and thus very big custom image sensors for some specific applications. Internal
multiplexing schemes allow random windowing with increased frame rate. When reducing the window size to a small ROI, the frame rate rises up to 170,000 frames/sec. Most sensors are realized in a 0.25 process.
Today CMOS is the technology preferred for high-speed imaging. In today's market we can clearly see three trends in high-speed image sensors; very high speed, feature integration on-chip and generic high-speed imagers.
A different trend, in high-speed imaging, is the integration of high-speed ADC's, sequencers, LVDS transmitters and correction algorithms on-chip. These imagers are generally inferior with respect to speed and sensitivity to the imagers above but compensate this with ease-of-use and system integration capabilities. A third type of imagers we see emerging in the market today are generic high-speed imagers. Older (simple) generic imagers with analog outputs or without on-board timing generation are being replaced by faster and more complex image sensors. These imagers allow generic high-speed cameras to be built in a short amount of time.
The pixelFigure 1 shows the schematic of the pixel used in a typical high-speed image sensor, which is the so-called 6-transitor pixel. Important for this type of image sensor is the pipelined global shutter feature.
The global shutter, in which all pixels start and end light integration at the same time, is very important for a high-speed application to have a well controlled motion blur that is exactly the same for all pixels. This global shutter allows high-speed motion scenes to be frozen by the imager.
Figure 1: The pixel
A typical high-speed capture sequence can be seen in Figure 2 (a small bullet hitting a matchstick). The pipelined feature means that during the readout of the pixel array, the integration of light in the pixel for the next frame is ongoing. This is required to guarantee that the frame rate is independent of the integration time.
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Figure 2: Typical high-speed capture sequence (bullet hits match stick)
To obtain the highest possible sensitivity, the photodiode, collecting the photo charge and converting this charge into a voltage, needs to be designed as small as possible to minimize its parasitic capacitance. Additionally, the fill factor of the pixel, meaning the open area in the pixel contributing to the light sensitive area needs to be as large as possible. Both features of a small photodiode and a large fill factor are achieved by implementing the N-well pixel patent, in combination with a P-well opening around the photodiode. Besides a high sensitivity, it is also important to have a pixel
storage capacitor that doesn't give any noise contribution, is well shielded from light and has a low leakage. This pixel architecture gives very good results with respect to storing the pixel signal during readout. The major disadvantage of this structure is the lack of fixed pattern noise correction in the pixel, which has to be done outside the image sensor.
Faster pixel rates
The metric for the speed of an image sensor is the product of resolution and frame rate, this gives the pixel rate of the sensor. In the very high-end, high-speed
imaging market, this metric can never be high enough. In this market, customers are willing to build very complex cameras as long as the desired full frame rate is achieved.
Figure 3 shows an image of a typical very high-speed application (car crash test).
These very high speeds are only achieved by using parallel analog outputs (up to 128 outputs) that impose an integration challenge for the camera system. The architecture of this type of imager is rather simple; 6T pixels in a pixel array which is optionally divided into quadrants, several parallel high-speed analog busses and parallel output amplifiers to drive the outputs.
Figure 3: High-speed imaging application: Car crash test.
No ADC's, sequencers or other on-chip image
processing is present on these chips. The chip-wide analog busses make sure all parallel outputs can be used regardless of the partial image size in the x direction that is readout. This allows boosting frame rate when reading out partial images.
GhostingAn important issue with these very high-speed image sensors is "ghosting" in the x-direction. This is caused by the relative large RC constant of the chip-wide analog busses. As it takes long for the signal on the busses to settle within 10-bit accuracy, a portion of the information of the previous pixel can still be present on the current pixel. In the image this results in ghosting in the x-direction. This type of ghosting is difficult to correct during image post processing.
One technique for addressing this problem is to precharge busses shortly before every new signal. This ensures that all information about previous pixels is destroyed. This technique requires the generation of short precharge pulses. The pulses are used to short the analog bus to ground. Most of these imagers are made as custom products upon request of the customers as there is no real need for this type of very high-speed imagers as a generic product today. Custom specifications can range from VGA to 10Mpixel and from 500 fps to 10000 fps, with data throughput up to 5.5Gpix/s. In figure 4 a typical very high-speed image sensor architecture is shown. Two halves are read-out in parallel with each having 64 parallel analog outputs. This results in a total of 128 high-speed parallel analog outputs!
Figure 4: Architecture of a typical very-high-speed image sensor
Smaller and easier to design withIn contradiction with the very complex (and big) camera systems built around the sensors in the previous section, there is an increasing demand in the market for smaller and easier to implement high-speed image sensors.
High-speed imagers are starting to get used in several consumer-like applications such as scanning, vision systems and holographic data storage. The figure below shows a typical holographic data storage application and the imager used in it.
Figure 5: Holographic data storge and its high-speed imager
These applications need a lot of the system functionality to be on-board the image sensor. That is why ADCs, timing generators, image processing and additional output stages are implemented on the chip. For these imagers the level of feature-implementation is equally important as the sensitivity and the speed. Most of these imagers are still made on custom request with specific features that help to simplify the custom high-speed camera design. The figure below gives a typical architecture of this type of high-speed imager. These imagers typically have only one clock input, a few power supplies and some synchronization pins. All other signals to read-out and expose the imager are generated on-chip.
Figure 6: Architecture of a typical high-speed image sensor with a lot of logic and additional features on-board
Generic high-speed image sensorsA third kind of high-speed image sensor we see (and have seen the last years) in the market is the general-purpose high-speed image sensor. Its applications range from machine vision cameras to traffic monitoring, scientific motion capturing and crash test inspection. The first generic high-speed image sensors consisted only of parallel analog outputs and had no logic on-board (much like the very high-speed imagers we know today). These days however we see a lot of features being implemented on the
chip itself to make sure the imager can be used in a lot of different applications (multiple slope, subsampling, binning, flipping, mirroring, gain, offset, and so on).
Today, high-speed global shutter image sensors are under development that will provide 1.3MPxl at 1000fps. Typically these image sensors have the pipelined snapshot shutter capability and multiple slope capability. The on-board features differ from sensor to sensor.
Figure 7: Variety of applications for which generic high-speed imagers can be used
There are several different types of high-speed image sensors which are needed to meet the needs of different markets today. Very high-speed imaging sensors are purely analog image sensors with very high frame rates and data throughput which require complex -- and therefore mainly custom -- camera design. High-speed imaging sensors with on-board features offer many specific on-board features which assists developers in building these imagers into high-speed cameras which are used for more consumer-oriented applications. Features are implemented upon request of the customer so these are also mainly custom designs.
Finally, generic high-speed image sensors combine the most common features of the image sensors above to create a general-purpose image sensor capable of serving in cameras across a wide range of applications. These image sensors are available today off the shelf. Market trends suggest that on-board features, data rate, and resolution will continue to rise. The real challenge for developers moving into the future will be to combine a very high data rate image sensor with many on-board features such as LVDS and image processing.
About the author
Pieter Willems is working as a Product Applications Engineer at the image sensor business unit from Cypress semiconductor. He started his career in the engineering department from Fillfactory and moved to product management before being acquired by Cypress. He can be reached at fpw@cypress.com.
